Study and Design of Impedance-Source Networks for Power Conversion

Abstract

Magnetically coupled impedance-source networks are often connected with voltage source inverter to obtain a higher voltage gain and achieve less shoot-through duty ratio occupation. Among them, Π-source impedance source network was proposed to achieve higher voltage gain, lower current stress, smaller core size, and also smaller circulating current when compared with the conventional Δ-source inverter, but it still faces the problem of the voltage gain reduction caused by the parasitic resistances. The parasitic resistance effect becomes more serious by the high operating current nature of magnetically coupled impedance-source networks. Therefore, in this study, the effect of parasitic resistances on Π-source impedance network is investigated by modeling the Π-source converter with parasitic resistances consideration. Based on this, the voltage gain is firstly deduced and analyzed. Then, the characteristic of the voltage gain is researched under different shoot-through duty ratios, different winding ratios, and different resistances ratios. Different from the ideal lossless case, the voltage gain increases first and then decreases when the shoot-through duty ratio becomes larger. Finally, the correctness of the deduction and analysis in this report is verified by corresponding simulation and experimental results. In this report, besides the study on the magnetically coupled impedance-source networks, a switched inductor (SL) impedance source network is also studied and verified by both simulation and experiments and the shoot-through duty ratio range was improved. And the generalized nth order SL impedance source network is also proposed in this report, which will be experimentally verified in future works.