Please use this identifier to cite or link to this item: http://oaps.umac.mo/handle/10692.1/40
Title: A 107dB DR, 106dB SNDR Sigma-Delta ADC Using a Charge-Pump Integrator for Audio Application
Authors: JIANG, DONGYANG (姜冬陽)
LIANG, JUNHAO (梁俊豪)
Department: Department of Electrical and Computer Engineering
Faculty: Faculty of Science and Technology
Issue Date: 2014
Citation: JIANG D. Y., LIANG, J. H. (2014). A 107dB DR, 106dB SNDR Sigma-Delta ADC Using a Charge-Pump Integrator for Audio Application (Outstanding Academic Papers by Students (OAPS)). Retrieved from University of Macau, Outstanding Academic Papers by Students Repository.
Abstract: Real world are full of analog signals, such as sound, light and color. After the electronic revolution change came in, the magic brings novel device become a sort of clear existence, like film, mobile, radio. Sure, we can imagine the first people hearing the unclear voice from the telephone, the digital world is still a bounded existence with noise and distortion. But as a development, people are expecting for clear information and instructions, which means an extensive bridge between the analog and the digital world. To reach the goal, a high performance system which is called analog-to-digital converter (ADC) is necessary. It is worked in electronic circuits at the interface between the analog and the digital world. In this Final-Year-Project, we focus on the digital audio conversion as we are probably pretty sure of being told that we're in the middle of a digital audio revolution. In fact, for a hi-tech musician with an interest in computing and digital audio hardware, chances are more aware of the possibilities than most people. Comparing to other application like wireless communication, audio application covers a relatively narrow bandwidth but needs high resolution, due to that, Sigma-Delta (Σ−Δ) modulation based analog-to-digital (A/D) conversion technology is used in our system design as a cost effective alternative for high resolution (greater than 12 bits) converters which can be ultimately integrated on digital signal processor Ics. In this project, the Cascaded Resonator with Distributed Feed Forward (CRFB) is selected because of its high SNR and the narrow swing. Plus, a capacitive charge-pump is used to improve the power efficiency of the first stage amplifier. By using 3rd order CRFB architecture with charge-pump in the first stage, the simulated FOM is 204fJ/conversion-step from 1-V supply. This CP based modulator gives 106dB peak-SNDR and 107dB dynamic range over a 20 kHz bandwidth with 1.332mW 1.332mW power consumption, almost 32 % lower than that of the convention one.
Instructor: Prof. SIN, SAI WENG
Prof. U, SENG PAN
CHIO, U-FAT
HUSSAIN, ARSHAD
FONG, TEK KEI
Programme: Bachelor of Science in Electrical and Electronics Engineering
URI: http://hdl.handle.net/10692.1/40
Appears in Collections:FST OAPS 2014

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